Posit numbers were proposed as an alternative to IEEE floating-point: better accuracy near 1.0, a tapered dynamic range that concentrates precision where it matters most, and a mathematically cleaner structure. But posits have a variable-length regime field that makes hardware decode expensive — the decoder must determine the regime length before it can parse the exponent and fraction, creating a serial dependency that floating-point avoids.
Duarte et al. bound the regime field to 6 bits, creating b-posit. The restriction trades extreme dynamic range (which posits rarely use) for hardware simplicity. The decode circuitry shrinks by 71% in area, drops 79% in power consumption, and runs 60% faster. The dynamic range still spans 10^{−58} to 10^{58} — more than sufficient for nearly all HPC and AI applications. The accuracy advantages of posits are preserved because precision near unity comes from the fraction field, not the regime.
The b-posit decoder matches or beats IEEE 32-bit floating-point hardware on every metric. The posit format was always numerically superior in the relevant range; the hardware disadvantage was the only reason it wasn't adopted. Bounding the regime removes that disadvantage without touching the numerical properties that matter.
The through-claim is about the cost of generality. The original posit design allowed unbounded regime growth to handle extreme magnitudes. But supporting a range you never use imposes hardware cost on every operation you do use. The 6-bit bound is not a limitation — it is the recognition that the useful dynamic range is finite, and designing for the infinite case penalizes the common case. Removing a capability nobody needs is itself an optimization.